<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE article PUBLIC "-//NLM//DTD JATS (Z39.96) Journal Publishing DTD v1.3 20210610//EN" "JATS-journalpublishing1-3.dtd">
<article article-type="research-article" dtd-version="1.3" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xml:lang="ru"><front><journal-meta><journal-id journal-id-type="publisher-id">pribor</journal-id><journal-title-group><journal-title xml:lang="ru">Известия высших учебных заведений. Приборостроение</journal-title><trans-title-group xml:lang="en"><trans-title>Journal of Instrument Engineering</trans-title></trans-title-group></journal-title-group><issn pub-type="ppub">0021-3454</issn><issn pub-type="epub">2500-0381</issn><publisher><publisher-name>Национальный исследовательский университет ИТМО</publisher-name></publisher></journal-meta><article-meta><article-id pub-id-type="doi">10.17586/0021-3454-2024-67-4-330-337</article-id><article-id custom-type="elpub" pub-id-type="custom">pribor-160</article-id><article-categories><subj-group subj-group-type="heading"><subject>Research Article</subject></subj-group><subj-group subj-group-type="section-heading" xml:lang="ru"><subject>СИСТЕМНЫЙ АНАЛИЗ, УПРАВЛЕНИЕ И ОБРАБОТКА ИНФОРМАЦИИ</subject></subj-group><subj-group subj-group-type="section-heading" xml:lang="en"><subject>SYSTEM ANALYSIS, MANAGEMENT AND INFORMATION PROCESSING</subject></subj-group></article-categories><title-group><article-title>Методы оптимизации моделей нейронных сетей</article-title><trans-title-group xml:lang="en"><trans-title>Methods for Optimizing Neural Network Models</trans-title></trans-title-group></title-group><contrib-group><contrib contrib-type="author" corresp="yes"><name-alternatives><name name-style="eastern" xml:lang="ru"><surname>Мокрецов</surname><given-names>Н. С.</given-names></name><name name-style="western" xml:lang="en"><surname>Mokretsov</surname><given-names>N. S.</given-names></name></name-alternatives><bio xml:lang="ru"><p>Никита Сергеевич Мокрецов — аспирант, кафедра информационных систем</p><p>Санкт-Петербург</p></bio><bio xml:lang="en"><p>Nikita S. Mokretsov — Post-Graduate Student, Department of Information Systems</p><p>St. Petersburg</p></bio><email xlink:type="simple">nikitamokrecov6374@gmail.com</email><xref ref-type="aff" rid="aff-1"/></contrib><contrib contrib-type="author" corresp="yes"><name-alternatives><name name-style="eastern" xml:lang="ru"><surname>Архипцев</surname><given-names>Е. Д.</given-names></name><name name-style="western" xml:lang="en"><surname>Arkhiptsev</surname><given-names>E. D.</given-names></name></name-alternatives><bio xml:lang="ru"><p>Евгений Дмитриевич Архипцев — аспирант, кафедра информационных систем</p><p>Санкт-Петербург</p></bio><bio xml:lang="en"><p>Evgeny D. Arkhiptsev — Post-Graduate Student, Department of Information Systems</p><p>St. Petersburg</p></bio><email xlink:type="simple">lokargenia@gmail.com</email><xref ref-type="aff" rid="aff-1"/></contrib></contrib-group><aff-alternatives id="aff-1"><aff xml:lang="ru"><institution>Санкт-Петербургский государственный электротехнический университет „ЛЭТИ“ им. В. И. Ульянова (Ленина)</institution></aff><aff xml:lang="en"><institution>St. Petersburg Electrotechnical University</institution></aff></aff-alternatives><pub-date pub-type="collection"><year>2024</year></pub-date><pub-date pub-type="epub"><day>27</day><month>11</month><year>2024</year></pub-date><volume>67</volume><issue>4</issue><fpage>330</fpage><lpage>337</lpage><permissions><copyright-statement>Copyright &amp;#x00A9; Национальный исследовательский университет ИТМО, 2024</copyright-statement><copyright-year>2024</copyright-year><copyright-holder xml:lang="ru">Национальный исследовательский университет ИТМО</copyright-holder><copyright-holder xml:lang="en">Национальный исследовательский университет ИТМО</copyright-holder><license xlink:href="https://pribor.ifmo.ru/jour/about/submissions#copyrightNotice" xlink:type="simple"><license-p>https://pribor.ifmo.ru/jour/about/submissions#copyrightNotice</license-p></license></permissions><self-uri xlink:href="https://pribor.ifmo.ru/jour/article/view/160">https://pribor.ifmo.ru/jour/article/view/160</self-uri><abstract><p>Рассмотрены методы построения ускорителей глубокого обучения. Показано, что традиционные подходы к обеспечению отказоустойчивости ускорителей глубокого обучения основаны на избыточных вычислениях, что приводит к значительным накладным расходам, включая время обучения, энергопотребление и размеры интегральных схем. Рассмотрен метод, основанный на учете различий в уязвимости отдельных нейронов и битов каждого нейрона, частично решающий проблему избыточности вычислений. Метод позволяет избирательно защищать компоненты модели на уровне архитектуры и схемы, что снижает накладные расходы без ущерба для надежности модели. Показано, что квантование модели ускорителя глубокого обучения позволяет представлять данные меньшим числом битов, что снижает требования к аппаратным ресурсам.</p></abstract><trans-abstract xml:lang="en"><p>Methods for building optimized deep learning accelerators are discussed. Traditional approaches to fault-tolerant deep learning accelerators are shown to rely on redundant computation, which results in significant overheads including training time, power consumption, and integrated circuit size. A method is proposed that considers differences in the vulnerability of individual neurons and the bits of each neuron, which partially solves the problem of computational redundancy. The method allows you to selectively protect model components at the architectural and circuit levels, which reduces overhead without compromising the reliability of the model. It is shown that quantization of the deep learning accelerator model allows data to be represented in fewer bits, which reduces hardware resource requirements.</p></trans-abstract><kwd-group xml:lang="ru"><kwd>глубокое обучение</kwd><kwd>ускоритель глубокого обучения</kwd><kwd>отказоустойчивость</kwd><kwd>межуровневая оптимизация</kwd><kwd>квантование модели обучения</kwd></kwd-group><kwd-group xml:lang="en"><kwd>deep learning</kwd><kwd>deep learning accelerator</kwd><kwd>fault tolerance</kwd><kwd>cross-layer optimization</kwd><kwd>learning model quantization</kwd></kwd-group></article-meta></front><back><ref-list><title>References</title><ref id="cit1"><label>1</label><citation-alternatives><mixed-citation xml:lang="ru">Chen Y., Luo T., Liu S., Zhang S., He L., Wang J., Li L., Chen T., Xu Z., Sun N. Dadiannao: A machine-learning supercomputer // Annual IEEE/ACM Intern. Symp. on Microarchitecture. 2014. Vol. 47. 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