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<article article-type="research-article" dtd-version="1.3" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xml:lang="ru"><front><journal-meta><journal-id journal-id-type="publisher-id">pribor</journal-id><journal-title-group><journal-title xml:lang="ru">Известия высших учебных заведений. Приборостроение</journal-title><trans-title-group xml:lang="en"><trans-title>Journal of Instrument Engineering</trans-title></trans-title-group></journal-title-group><issn pub-type="ppub">0021-3454</issn><issn pub-type="epub">2500-0381</issn><publisher><publisher-name>Национальный исследовательский университет ИТМО</publisher-name></publisher></journal-meta><article-meta><article-id pub-id-type="doi">10.17586/0021-3454-2022-65-4-231-246</article-id><article-id custom-type="elpub" pub-id-type="custom">pribor-286</article-id><article-categories><subj-group subj-group-type="heading"><subject>Research Article</subject></subj-group><subj-group subj-group-type="section-heading" xml:lang="ru"><subject>ИНФОРМАЦИОННЫЕ ТЕХНОЛОГИИ И СИСТЕМЫ, ВЫЧИСЛИТЕЛЬНАЯ ТЕХНИКА</subject></subj-group><subj-group subj-group-type="section-heading" xml:lang="en"><subject>INFORMATION TECHNOLOGIES AND SYSTEMS, COMPUTER TECHNIQUE</subject></subj-group></article-categories><title-group><article-title>Взвешенные коды с суммированием в кольце вычетов по произвольному модулю для синтеза цифровых вычислительных устройств</article-title><trans-title-group xml:lang="en"><trans-title>Weighted codes with summation in the ring of residues by an arbitrary modulus for the synthesis of digital computing devices</trans-title></trans-title-group></title-group><contrib-group><contrib contrib-type="author" corresp="yes"><name-alternatives><name name-style="eastern" xml:lang="ru"><surname>Ефанов</surname><given-names>Д. В.</given-names></name><name name-style="western" xml:lang="en"><surname>Efanov</surname><given-names>D. V.</given-names></name></name-alternatives><bio xml:lang="ru"><p>Ефанов Дмитрий Викторович — д-р техн. наук, доцент; РУТ, кафедра автоматики, телемеханики и связи на железнодорожном транспорте; СПбПУ Петра Великого; Высшая школа транспорта Института машиностроения, материалов и транспорта; профессор.</p><p>Москва; Санкт-Петербург</p></bio><bio xml:lang="en"><p>Dmitry V. Efanov — Dr. Sci., Associate Professor; Russian University of Transport, Department of Automation, Remote Control, and Communications on Railway Transport; Peter the Great St. Petersburg Polytechnic University, Institute of Machinery, Materials, and Transport; Professor.</p><p>Moscow; St. Petersburg</p></bio><email xlink:type="simple">TrES-4b@yandex.ru</email><xref ref-type="aff" rid="aff-1"/></contrib><contrib contrib-type="author" corresp="yes"><name-alternatives><name name-style="eastern" xml:lang="ru"><surname>Пашуков</surname><given-names>А. В.</given-names></name><name name-style="western" xml:lang="en"><surname>Pashukov</surname><given-names>А. V.</given-names></name></name-alternatives><bio xml:lang="ru"><p>Пашуков Артем Валерьевич —кафедра автоматики, телемеханики и связи на железнодорожном транспорте; ассистент.</p><p>Москва</p></bio><bio xml:lang="en"><p>Artyom V. Pashukov — Russian University of Transport, Department of Automation, Remote Control, and Communications on Railway Transport; Assistant.</p><p>Moscow</p></bio><email xlink:type="simple">art_pash@mail.ru</email><xref ref-type="aff" rid="aff-2"/></contrib></contrib-group><aff-alternatives id="aff-1"><aff xml:lang="ru"><institution>Российский университет транспорта; Санкт-Петербургский политехнический университет Петра Великого</institution></aff><aff xml:lang="en"><institution>Russian University of Transport; Peter the Great St. Petersburg Polytechnic University</institution></aff></aff-alternatives><aff-alternatives id="aff-2"><aff xml:lang="ru"><institution>Российский университет транспорта</institution></aff><aff xml:lang="en"><institution>Russian University of Transport</institution></aff></aff-alternatives><pub-date pub-type="collection"><year>2022</year></pub-date><pub-date pub-type="epub"><day>02</day><month>12</month><year>2024</year></pub-date><volume>65</volume><issue>4</issue><fpage>231</fpage><lpage>246</lpage><permissions><copyright-statement>Copyright &amp;#x00A9; Национальный исследовательский университет ИТМО, 2024</copyright-statement><copyright-year>2024</copyright-year><copyright-holder xml:lang="ru">Национальный исследовательский университет ИТМО</copyright-holder><copyright-holder xml:lang="en">Национальный исследовательский университет ИТМО</copyright-holder><license xlink:href="https://pribor.ifmo.ru/jour/about/submissions#copyrightNotice" xlink:type="simple"><license-p>https://pribor.ifmo.ru/jour/about/submissions#copyrightNotice</license-p></license></permissions><self-uri xlink:href="https://pribor.ifmo.ru/jour/article/view/286">https://pribor.ifmo.ru/jour/article/view/286</self-uri><abstract><p>При синтезе самопроверяемых и отказоустойчивых цифровых вычислительных систем часто применяются двоичные избыточные коды. Их использование позволяет снизить структурную избыточность для наделения устройств свойством самопроверяемости или отказоустойчивости. Приведены результаты исследования широкого класса кодов с суммированием, при построении которых используются заранее выбираемые последовательности весовых коэффициентов и процедура суммирования в кольце вычетов по предварительно зафиксированному модулю. Рассмотрены коды с тремя последовательностями весовых коэффициентов: 1) натуральный ряд; 2) натуральный ряд за исключением степеней числа 2; 3) чередующиеся последовательности возрастающих степеней числа 2. Установлены характеристики обнаружения ошибок кодами по кратностям и видам (монотонные, симметричные и асимметричные). Приведены условия построения помехозащищенных кодов, а также методы модификации кодов для наделения их свойством помехозащищенности. Представлены результаты экспериментов с контрольными комбинационными схемами по применению описанных кодов для обнаружения ошибок на их выходах. Обсуждаются особенности применения модульных взвешенных кодов с суммированием при синтезе цифровых устройств.</p></abstract><trans-abstract xml:lang="en"><p>In the synthesis of self-checking and fault-tolerant digital computing systems, binary redundant codes are often used. Their use makes it possible to reduce structural redundancy in order to endow devices with the property of self-checking or fault tolerance. Results of the study of a wide class of codes with summation are presented, in the construction of which preselected sequences of weight coefficients and the summation procedure in the ring of residues by a preliminarily fixed modulus are used. Codes with three sequences of weight coefficients are considered: 1) natural numbers; 2) natural series except for powers of 2; 3) alternating sequences of increasing powers of the number 2. Characteristics of error detection by codes by multiplicities and types (monotonic, symmetric and asymmetric) are established. Conditions for constructing noise-immune codes, as well as methods for modifying codes to endow them with the property of noise immunity, are given. Results of experiments with control combinational circuits on the use of the described codes for error detection at their outputs are presented. The features of the use of modular weighted codes with summation in the synthesis of digital devices are discussed.</p></trans-abstract><kwd-group xml:lang="ru"><kwd>самопроверяемые и отказоустойчивые устройства</kwd><kwd>коды с суммированием</kwd><kwd>обнаружение ошибок в информационных векторах</kwd><kwd>суммирование в кольце вычетов по установленному модулю</kwd><kwd>весовые коэффициенты разрядов</kwd></kwd-group><kwd-group xml:lang="en"><kwd>self-checking and fault-tolerant devices</kwd><kwd>codes with summation</kwd><kwd>error detection in information vectors</kwd><kwd>summation in the ring of residues modulo</kwd><kwd>weight coefficients of digits</kwd></kwd-group></article-meta></front><back><ref-list><title>References</title><ref id="cit1"><label>1</label><citation-alternatives><mixed-citation xml:lang="ru">Fujiwara E. Code Design for Dependable Systems: Theory and Practical Applications. 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