Self-dual discrete devices with control of two subsets of outputs based on parity codes

The choice of controlled outputs divided into two subsets when organizing integrated control circuits for discrete devices using the properties of parity codes, are considered. Three basic computing control structures are described that operate in pulse mode using time redundancy and representing signals as sequences of zeros and ones. A structure for monitoring calculations at the outputs of discrete devices is proposed, combining the properties of the classical parity control structure and a structure with control of self-duality of calculations. The features of the distinguished subsets of outputs of discrete devices are established. The possibility is shown to identify methods of dividing outputs into subsets, for the control of each of which only self-dual or only self-quasi-dual Boolean functions “close” to them are used. Formulas describing the number of ways of dividing the outputs of discrete devices into subsets with special properties are obtained. Examples of calculations based on these formulas are given. The regularities inherent in the structures under consideration and manifesting themselves with an increase in the number of outputs of discrete devices are described. The results of the presented study may be of interest to developers of discrete devices with fault detection implemented on various element bases.

1. Ubar R., Raik J., Jenihhin M., Jutman A. Structural Decision Diagrams in Digital Test: Theory and Applications, Springer Nature Switzerland AG, 2024, 595 p., DOI: 10.1007/978-3-031-44734-1.

2. Hahanov V., Gharibi W., Chumachenko S., Litvinova E. IAES International Journal of Robotics and Automation (IJRA), 2024, no. 3(13), pp. 293–306, DOI: 10.11591/ijra.v13i3.pp293-306.

3. Fujiwara E. Code Design for Dependable Systems: Theory and Practical Applications, John Wiley & Sons, 2006, 720 p.

4. Göessel M., Ocheretny V., Sogomonyan E., Marienfeld D. New Methods of Concurrent Checking, Dordrecht, Springer Science+Business Media B.V., 2008, 184 p.

5. Sapozhnikov V.V., Sapozhnikov Vl.V. Diskretnyye avtomaty s obnaruzheniyem otkazov (Discrete Automata with Failure Detection), Leningrad, 1984, 112 р. (in Russ.)

6. Sogomonyan E.S., Slabakov E.V. Samoproveryaemye ustroystva i otkazoustoychivye sistemy (The Self-Checked Devices and Failure-Safe Systems), Moscow, 1989, 208 р. (in Russ.)

7. Efanov D.V. Metody sinteza samoproveryayemykh diskretnykh ustroystv (Methods for Synthesizing Self-Checking Discrete Devices), Moscow, 2025, 268 р. (in Russ.)

8. Sapozhnikov V.V., Sapozhnikov Vl.V., Efanov D.V. Kody Khemminga v sistemakh funktsional’nogo kontrolya logicheskikh (Hamming Codes in Functional Control Systems of Logical), St. Petersburg, 2018, 151 р. (in Russ.)

9. Sapozhnikov V.V., Sapozhnikov Vl.V., Efanov D.V. Kody s summirovaniyem dlya sistem tekhnicheskogo diagnostirovaniya. T. 1. Klassicheskiye kody Bergera i ikh modifikatsii (Summed Codes for Technical Diagnostic Systems. Vol. 1. Classical Berger Codes and Their Modifications), Moscow, 2020, 383 р. (in Russ.)

10. Sapozhnikov V.V., Sapozhnikov Vl.V., Efanov D.V. Kody s summirovaniyem dlya sistem tekhnicheskogo diagnostirovaniya. T. 2. Vzveshennyye kody s summirovaniyem (Summed Codes for Technical Diagnostic Systems. Vol. 2. Weighted Codes with Summation), Moscow, 2021, 455 р. (in Russ.)

11. Ghosh S., Basu S., Touba N.A. Proceedings of 23rd IEEE VLSI Test Symposium (VTS’05), 2005, pp. 315–320.

12. Sahana A.R., Chiraag V., Suresh G., Thejaswini P., Nandi S. Proceedings of 2023 IEEE Guwahati Subsection Conference (GCON), Guwahati, 2023, DOI: 10.1109/GCON58516.2023.10183449.

13. Acharya G.P., Rani M.A. Journal of Semiconductors, 2018, no. 11(39), pp. 115001, DOI: 10.1088/1674-4926/39/11/115001.

14. Mohammadi S., Omidi R., Lotfinejad M. Journal of Electronic Testing, 2020, no. 4(36), pp. 555–563, DOI: 10.1007/s10836-020-05887-0.

15. Efanov D.V. Journal of Computer and Systems Sciences International, 2025, no. 5(64), pp. 748–764, DOI: 10.1134/S1064230725700637.

16. Gavrilov S.V., Gurov S.I., Zhukova T.D., Ryzhova D.I. Information Technologies, 2016, no. 12(22), pp. 931–937. (in Russ.)

17. Tshagharyan G., Harutyunyan G., Shoukourian S., Zorian Y. Proceedings of 15th IEEE East-West Design & Test Symposium (EWDTS’2017), Novi Sad, Serbia, September 29–October 2, 2017, pp. 25–28, DOI: 10.1109/EWDTS.2017.8110065.

18. Aksenova G.P. Avtomatika i Telemekhanika, 1987, no. 10, pp. 144–153. (in Russ.)

19. Sagalovich Y.L., Solomennikov V.Y. Problems Inform. Transmission, 1997, no. 2(33), pp. 163–173.

20. Efanov D.V., Pogodina T.S., Aripov N.M., Boltayev S.T., Azizov A.R., Ametova E.K., Toshboyev Z.B. Computation, 2025, no. 9(13), art. no. 220, DOI: 10.3390/computation13090220.

21. Shalyto A.A. Journal of Computer and Systems Sciences International, 2001, no. 5, pp. 782–792.

22. Dmitriev A., Saposhnikov V., Saposhnikov V., Goessel M. VLSI Design, 2000, no. 1(11), pp. 1–21, DOI: 10.1155/2000/84720.

23. Sogomonyan E.S. Automation and Remote Control, 1974, no. 2(35), pp. 280–289.

24. Aksenova G.P., Sogomonian Ye.S. Automation and Remote Control, 1975, no. 7(36), pp. 1169–1177.

25. Sapozhnikov V., Sapozhnikov Vl., Efanov D. Proceedings of 13th IEEE East-West Design & Test Symposium (EWDTS’2015), Batumi, Georgia, September 26–29, 2015, pp. 181–187, DOI: 10.1109/EWDTS.2015.7493133.

26. Goessel M., Sogomonyan E.S. Automation and Remote Control, 1992, no. 8(53), pp. 1264–1272.

27. Sogomonyan E.S., Gössel M. Journal of Electronic Testing: Theory and Applications, 1993, no. 4(4), pp. 267–281, DOI: 10.1007/BF00971975.

28. Efanov D.V. Tomsk State University Journal of Control and Computer Science, 2023, no. 65, pp. 126–138, DOI: 10.17223/19988605/65/13. (in Russ.)

29. Efanov D.V., Pivovarov D.V. Automation and Remote Control, 2025, no. 5(86), pp. 402–416, DOI: https://doi.org/10.31857/S0005117925050038.

30. Saposhnikov Vl.V., Dmitriev A., Goessel M., Saposhnikov V.V. Proceedings of 14th IEEE VLSI Test Symposium, USA, Princeton, 1996, pp. 162–168.

31. Gessel’M., Dmitriev A.V., Sapozhnikov V.V., Sapozhnokov Vl.V. Automation and Remote Control, 1999, no. 11, pp. 1653–1663.

32. Gessel’M., Dmitriev A.V., Sapozhnikov V.V., Sapozhnokov Vl.V. Automation and Remote Control, 2000, no. 7(61), pp. 1192–1200.

33. Sapozhnikov V.V., Sapozhnikov Vl.V., Gessel M. Samodvoystvennyye diskretnyye ustroystva (Self-Dual Discrete Devices), St. Petersburg, 2001, 331 p. (in Russ.)

34. Hessel M., Moshanin V.I., Sapozhnikov V.V., Sapozhnokov Vl.V. Avtomatika i Telemekhanika, 1997, no. 12, pp. 193– 200. (in Russ.)

35. Efanov D.V., Pivovarov D.V. Journal of Instrument Engineering, 2024, no. 1(67), pp. 5–19, DOI: 10.17586/0021-3454-2024-67-1-5-19. (in Russ.)

36. Lala P.K. Self-Checking and Fault-Tolerant Digital Design, San Francisco, Morgan Kaufmann Publishers, 2001, 216 p.

37. Chioktour V., Kakarountas A. Electronics, 2022, no. 11(19), pp. 1–20, DOI: 10.3390/electronics11193193.

38. Sentovich E.M., Singh K.J., Moon C., Savoj H., Brayton R.K., Sangiovanni-Vincentelli A. Proc. IEEE Intern. Conf. on Computer Design: VLSI in Computers & Processors, Cambridge, MA, USA, 1992, pp. 328–333, DOI: 10.1109/ICCD.1992.276282.

39. Sentovich E.M., Singh K.J., Lavagno L., Moon C., Murgai R., Saldanha A., Savoj H., Stephan P.R., Brayton R.K., Sangiovanni-Vincentelli A. SIS: A System for Sequential Circuit Synthesis, Electronics Research Laboratory, Department of Electrical Engineering and Computer Science, Berkeley, University of California, 1992, 45 p.