ISSN 0021-3454 (print version)
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10
Issue
vol 67 / October, 2024
Article

DOI 10.17586/0021-3454-2017-60-6-519-528

UDC 621.391

NOISE LEVEL REDUCTION AT DUPLEX PASSIVE DIGITAL SYNTHESIZER OUTPUT

Y. A. Nikitin
Radio Research Institute, St. Petersburg Branch — LONIIR; Senior Scientist


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Abstract. A model of complex-periodic lattice function, which is convenient to analyze the process of formation of two-level fluctuations at the output of a system of passive digital frequency synthesis is considered. The mechanism of noise generation in the spectrum of the output oscillations and the ways of their reduction with the help of devices for pulse signal delay control are analyzed. Several variants of implementation of such devices on the basis of intermediate transformations of the current delay code into time interval are proposed.
Keywords: finite state machine, pulse counter, accumulating adder, frequency synthesis, discrete side spectral component

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