Reference for citation: Efanov D. V., Pogodina T. S. Control of self-dual devices using compression circuits based on full adders. Journal of Instrument Engineering. 2023. Vol. 66, N 7. P. 539—558 (in Russian). DOI: 10.17586/0021-3454-2023-66-7-539-558.

Abstract. The problem of organizing the control of calculations by a diagnostic parameter characterizing the belonging of the functions calculated by the object of diagnosis to the class of self-dual Boolean functions is considered. The structure of a self-dual device with control of each output separately is described. A structure is proposed for a built-in control circuit using a special signal compression scheme. Such a structure makes it possible to reduce the number of observed outputs and thereby reduce the number of elements in the structure of the built-in control circuit (ICS). Standard circuits of full adders, which are self-dual digital devices, are supposed to be used as signal compression devices. It is shown that such an approach to the ICS organization makes it possible to reduce the complexity of its technical implementation by approximately 8–9% compared to the control of calculations at each output of the diagnostic object. Formulas for estimating the complexity of the implementation of the ICS for each method of its organization are given. Algorithms for the synthesis of ICS with the use of signal compression schemes are formulated. The data obtained by modeling self-dual structures using the considered methods in the Multisim modeling environment are demonstrated. The presented results enable practical synthesis of self-checking digital devices and computing systems.

Keywords: self-checking digital devices, error-detecting in digital devices, built-in error-detection circuit, checking self-duality of signals, self-dual devices, full-adder

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